1. Field of the Invention
The present invention relates to a semiconductor manufacturing process, more particularly, the present invention relates to an LDMOS transistor manufacturing process.
2. Description of Related Art
Self-driven LDMOS transistor technologies have been proposed, wherein one technology includes adjustment of a start-threshold voltage of an LDNMOS transistor, for instance, to a lower voltage potential with additional ion implantation. However, the disadvantage of this technology is higher leakage current, lowered breakdown voltage, and additional masking process cost. Another technology utilizes a parasitic drain-to-gate capacitor to couple a gate-voltage potential to make a self-driven LDMOS transistor. However, the capacitance of the parasitic drain-to-gate capacitor varies in response to a depletion capacitor connected in series, which fails to accurately control the gate-voltage potential at a required voltage potential. Yet another technology utilizes a voltage divider having a high resistance poly resistor between a gate and a drain of the LDMOS transistor and a resistor connected from the gate to a substrate to provide a gate-voltage potential for turning on the LDMOS transistor. However, the disadvantages of this invention include high resistance variation of the poly resistor, additional masking process cost, and larger occupied die space.